98 lines
3.2 KiB
Org Mode
98 lines
3.2 KiB
Org Mode
* Theory question EX1
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Keep in mind that your design and your implementation are separate entities,
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thus you should answer these questions based on your ideal design, not your
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finished implementation. Consequently I will not consider your implementation
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when grading these questions, thus even with no implementation at all you
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should still be able to score 100% on the theory questions.
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All questions can be answered in a few sentences. Remember that brevity is the
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soul of wit, and also the key to getting a good score.
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** Question 1
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2 points.
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*** Part 1
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When decoding the BNE branch instruction in the above assembly program
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#+begin_src asm
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bne x6, x2, "loop",
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#+end_src
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In your design, what is the value of each of the control signals below?
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+ memToReg
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+ regWrite
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+ memRead
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+ memWrite
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+ branch
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+ jump
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Keep in mind that your design and your implementation are separate entities, thus
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you should answer this question based on your ideal design, not your finished
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implementation.
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*** Part 2
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During execution, at some arbitrary cycle the control signals are:
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+ memToReg = 0
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+ regWrite = 1
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+ memRead = 0
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+ memWrite = 0
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+ branch = 0
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+ jump = 1
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In your design, which intruction(s) could be executing?
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Keep in mind that your design and your implementation are separate entities, thus
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you should answer this question based on your ideal design, not your finished
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implementation.
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** Question 2
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4 points.
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Reading the binary of a RISC-V program you get the following:
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#+begin_src text
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0x0: 0x00a00293 -- 0000 0000 1010 0000 0000 0010 1001 0011
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0x4: 0x01400313 -- 0000 0001 0100 0000 0000 0011 0001 0011
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0x8: 0xfff30313 -- 1111 1111 1111 0011 0000 0011 0001 0011
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0xc: 0x00628463 -- 0000 0000 0110 0010 1000 0100 0110 0011
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0x10: 0xff9ff06f -- 1111 1111 1001 1111 1111 0000 0110 1111
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#+end_src
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For each instruction describe the format and name and corresponding RISC-V source
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To give you an idea on how decoding would work, here is the decoding of 0x40635293:
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#+begin_src text
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0x40635293 -- 0100 0000 0110 0011 0101 0010 1001 0011
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Opcode: 0010011 => Format is IType, thus the funct3 field is used to decode further
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funct3: 101 => Instruction is of type SRAI, the instruction looks like ~srai rd, rx, imm~
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rs1: 00110 => x6
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rd: 00101 => x5
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shamt: 000110 => 6
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Resulting in ~srai x5, x6, 6~
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#+end_src
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*Your answer should be in the form of a simple asm program.*
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(hint 1: the original asm program had a label, you need to infer where that label was)
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(hint 2: verify your conclusion by assembling your answer)
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** Question 3
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4 points.
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In order to load a large number LUI and ADDI are used.
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consider the following program
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#+begin_src asm
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li x0, 0xFF
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li x1, 0x600
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li x2, 0x8EE
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li x3, 0xBABEFACE
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li x4, 0xBABE07CE
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#+end_src
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a) Which of these instructions will be split into ADDI LUI pairs?
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b) Why do the two last instructions need to be handled differently from each other?
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(hint: The parser and assembler in the test suite can help you answer this question)
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