Simplify IDBarrier.
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42d77a0d85
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9192d576e7
2 changed files with 52 additions and 123 deletions
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@ -80,39 +80,39 @@ class CPU extends MultiIOModule {
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ID.io.instruction := IFBarrier.instructionOut
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ID.io.pc := IFBarrier.PCout
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IDBarrier.op1in := ID.io.op1
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IDBarrier.op2in := ID.io.op2
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IDBarrier.isOp1RValueIn := ID.io.isOp1RValue
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IDBarrier.isOp2RValueIn := ID.io.isOp2RValue
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IDBarrier.r1ValueIn := ID.io.r1Value
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IDBarrier.r2ValueIn := ID.io.r2Value
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IDBarrier.r1AddressIn := ID.io.r1Address
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IDBarrier.r2AddressIn := ID.io.r2Address
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IDBarrier.ALUopIn := ID.io.ALUOp
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IDBarrier.returnAddrIn := ID.io.returnAddr
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IDBarrier.jumpIn := ID.io.jump
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IDBarrier.branchTypeIn := ID.io.branchType
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IDBarrier.writeEnableIn := ID.io.writeEnableOut
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IDBarrier.writeAddrIn := ID.io.writeAddrOut
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IDBarrier.memWriteIn := ID.io.memWrite
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IDBarrier.memReadIn := ID.io.memRead
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IDBarrier.in.op1 := ID.io.op1
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IDBarrier.in.op2 := ID.io.op2
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IDBarrier.in.isOp1RValue := ID.io.isOp1RValue
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IDBarrier.in.isOp2RValue := ID.io.isOp2RValue
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IDBarrier.in.r1Value := ID.io.r1Value
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IDBarrier.in.r2Value := ID.io.r2Value
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IDBarrier.in.r1Address := ID.io.r1Address
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IDBarrier.in.r2Address := ID.io.r2Address
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IDBarrier.in.ALUop := ID.io.ALUOp
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IDBarrier.in.returnAddr := ID.io.returnAddr
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IDBarrier.in.jump := ID.io.jump
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IDBarrier.in.branchType := ID.io.branchType
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IDBarrier.in.writeEnable := ID.io.writeEnableOut
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IDBarrier.in.writeAddr := ID.io.writeAddrOut
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IDBarrier.in.memWrite := ID.io.memWrite
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IDBarrier.in.memRead := ID.io.memRead
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EX.io.op1 := forward(IDBarrier.op1out.asUInt(), IDBarrier.r1AddressOut, IDBarrier.isOp1RValueOut, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.op2 := forward(IDBarrier.op2out.asUInt(), IDBarrier.r2AddressOut, IDBarrier.isOp2RValueOut, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.ALUOp := IDBarrier.ALUopOut
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EX.io.branchType := IDBarrier.branchTypeOut
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EX.io.rs1ValueIn := forward(IDBarrier.r1ValueOut, IDBarrier.r1AddressOut, true.B, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.rs2ValueIn := forward(IDBarrier.r2ValueOut, IDBarrier.r2AddressOut, true.B, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.op1 := forward(IDBarrier.out.op1.asUInt(), IDBarrier.out.r1Address, IDBarrier.out.isOp1RValue, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.op2 := forward(IDBarrier.out.op2.asUInt(), IDBarrier.out.r2Address, IDBarrier.out.isOp2RValue, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.ALUOp := IDBarrier.out.ALUop
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EX.io.branchType := IDBarrier.out.branchType
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EX.io.rs1ValueIn := forward(IDBarrier.out.r1Value, IDBarrier.out.r1Address, true.B, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EX.io.rs2ValueIn := forward(IDBarrier.out.r2Value, IDBarrier.out.r2Address, true.B, mem = MEMBarrier.forwardMem, wb = MEMBarrier.forwardWb, id = MEMBarrier.forwardId).asSInt()
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EXBarrier.in.r2Value := EX.io.rs2ValueOut.asUInt()
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EXBarrier.in.ALUResult := EX.io.ALUResult.asUInt()
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EXBarrier.in.branch := EX.io.branch
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EXBarrier.in.jump := IDBarrier.jumpOut
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EXBarrier.in.returnAddr := IDBarrier.returnAddrOut
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EXBarrier.in.writeEnable := IDBarrier.writeEnableOut
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EXBarrier.in.writeAddr := IDBarrier.writeAddrOut
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EXBarrier.in.memWrite := IDBarrier.memWriteOut
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EXBarrier.in.memRead := IDBarrier.memReadOut
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EXBarrier.in.jump := IDBarrier.out.jump
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EXBarrier.in.returnAddr := IDBarrier.out.returnAddr
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EXBarrier.in.writeEnable := IDBarrier.out.writeEnable
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EXBarrier.in.writeAddr := IDBarrier.out.writeAddr
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EXBarrier.in.memWrite := IDBarrier.out.memWrite
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EXBarrier.in.memRead := IDBarrier.out.memRead
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MEM.io.ALUResult := EXBarrier.out.ALUResult
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MEM.io.jump := EXBarrier.out.jump
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