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** Your task
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Your job is to implement a model that tests how many delay cycles will occur for a cache which:
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+ Follows a 2-way associative scheme
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+ Block size is 4 words (128 bits)
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+ Is write-through write no-allocate
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+ Block size is 4 words (128 bits) (total cache size: a whopping 256 bits)
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+ Is write-through write no-allocate (this means that you can ignore stores, only loads will affect the cache)
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+ Eviction policy is LRU (least recently used)
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Your answer should be the number of cache miss latency cycles when using this cache.
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