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Simplify MEMBarrier.

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This commit is contained in:
Sebastian Bugge 2024-11-08 01:47:20 +01:00
parent 9192d576e7
commit 4cfd8268fd
Signed by: kaholaz
GPG key ID: 2EFFEDEE03519691
2 changed files with 29 additions and 38 deletions
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12
src/main/scala/CPU.scala
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@ -122,14 +122,14 @@ class CPU extends MultiIOModule {
MEM.io.writeData := EXBarrier.out.r2Value
MEMBarrier.memRead := EXBarrier.out.memRead
MEMBarrier.dataIn := MEM.io.dataOut
MEMBarrier.writeEnableIn := EXBarrier.out.writeEnable
MEMBarrier.writeAddrIn := EXBarrier.out.writeAddr
MEMBarrier.in.data := MEM.io.dataOut
MEMBarrier.in.writeEnable := EXBarrier.out.writeEnable
MEMBarrier.in.writeAddr := EXBarrier.out.writeAddr
// Write back
ID.io.writeData := MEMBarrier.dataOut
ID.io.writeEnableIn := MEMBarrier.writeEnableOut
ID.io.writeAddrIn := MEMBarrier.writeAddrOut
ID.io.writeData := MEMBarrier.out.data
ID.io.writeEnableIn := MEMBarrier.out.writeEnable
ID.io.writeAddrIn := MEMBarrier.out.writeAddr
// Branching
IF.io.branch := EXBarrier.out.branch