Add stall.
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parent
bcbe07b601
commit
1d433dd791
4 changed files with 29 additions and 7 deletions
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@ -39,6 +39,7 @@ class InstructionDecode extends MultiIOModule {
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val branchType = Output(UInt(3.W))
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val jump = Output(Bool())
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val returnAddr = Output(UInt(32.W))
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val stall = Output(Bool())
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}
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)
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@ -84,13 +85,19 @@ class InstructionDecode extends MultiIOModule {
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io.r2Value := registers.io.readData2
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io.r2Address := registers.io.readAddress2
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io.jump := decoder.controlSignals.jump
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io.returnAddr := io.pc + 4.U
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io.ALUOp := decoder.ALUop
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io.branchType := decoder.branchType
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io.writeAddrOut := decoder.instruction.registerRd
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io.writeEnableOut := decoder.controlSignals.regWrite
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io.memRead := decoder.controlSignals.memRead
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io.memWrite := decoder.controlSignals.memWrite
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val stallDelay = RegInit(Bool(), false.B)
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val stall = Mux(stallDelay, false.B, decoder.controlSignals.memRead)
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io.stall := stall
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stallDelay := stall
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io.jump := Mux(stallDelay, false.B, decoder.controlSignals.jump)
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io.returnAddr := io.pc + 4.U
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io.writeEnableOut := Mux(stallDelay, false.B, decoder.controlSignals.regWrite)
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io.memRead := Mux(stallDelay, false.B, decoder.controlSignals.memRead)
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io.memWrite := Mux(stallDelay, false.B, decoder.controlSignals.memWrite)
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}
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