Add stall.

This commit is contained in:
Sebastian Bugge 2024-10-18 08:19:46 +02:00
parent bcbe07b601
commit 1d433dd791
Signed by: kaholaz
GPG key ID: 2EFFEDEE03519691
4 changed files with 29 additions and 7 deletions

View file

@ -39,6 +39,7 @@ class InstructionDecode extends MultiIOModule {
val branchType = Output(UInt(3.W))
val jump = Output(Bool())
val returnAddr = Output(UInt(32.W))
val stall = Output(Bool())
}
)
@ -84,13 +85,19 @@ class InstructionDecode extends MultiIOModule {
io.r2Value := registers.io.readData2
io.r2Address := registers.io.readAddress2
io.jump := decoder.controlSignals.jump
io.returnAddr := io.pc + 4.U
io.ALUOp := decoder.ALUop
io.branchType := decoder.branchType
io.writeAddrOut := decoder.instruction.registerRd
io.writeEnableOut := decoder.controlSignals.regWrite
io.memRead := decoder.controlSignals.memRead
io.memWrite := decoder.controlSignals.memWrite
val stallDelay = RegInit(Bool(), false.B)
val stall = Mux(stallDelay, false.B, decoder.controlSignals.memRead)
io.stall := stall
stallDelay := stall
io.jump := Mux(stallDelay, false.B, decoder.controlSignals.jump)
io.returnAddr := io.pc + 4.U
io.writeEnableOut := Mux(stallDelay, false.B, decoder.controlSignals.regWrite)
io.memRead := Mux(stallDelay, false.B, decoder.controlSignals.memRead)
io.memWrite := Mux(stallDelay, false.B, decoder.controlSignals.memWrite)
}