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e09a358320
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Use MUX instead of when.
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2024-09-27 08:49:36 +02:00 |
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abef04fc22
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LUI working.
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2024-09-27 08:42:43 +02:00 |
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a48c9a1ba8
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Working SLT
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2024-09-27 08:31:56 +02:00 |
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39a6c5f87e
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Working store and load.
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2024-09-27 08:14:15 +02:00 |
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f7c93b1292
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Half-working load.
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2024-09-27 07:51:25 +02:00 |
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961ae49523
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Add working 4real.
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2024-09-27 04:47:26 +02:00 |
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44ccf12cad
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Working adder.
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2024-09-27 04:22:10 +02:00 |
|
David Metz
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39c008567d
|
remove aliasing for branchType and fix tests ending in dependent load chains
|
2023-08-18 14:57:56 +02:00 |
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peteraa
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2e37f0b8d7
|
Merge branch 'master' of https://github.com/PeterAaser/TDT4255_EX2
|
2020-06-29 16:19:56 +02:00 |
|
peteraa
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9f47433501
|
Stuff I forgot to commit.
|
2020-06-29 16:17:24 +02:00 |
|
peteraaser
|
8dc92fb8e1
|
Remove MemToReg.
Pretty sure MemToReg is a MIPS relic, it is redundant so long as
all memory reads are put into registers.
|
2020-06-02 14:58:06 +02:00 |
|
peteraaser
|
3b635be2dc
|
Github render test
|
2020-06-01 14:16:08 +02:00 |
|
peteraa
|
8bb3c892a1
|
Beef up add walkthrough
|
2019-09-05 14:37:33 +02:00 |
|
peteraa
|
27b7c0556e
|
Simplify NOP and bubble logic.
|
2019-09-05 14:09:05 +02:00 |
|
peteraa
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8e2d686b5c
|
Add special handlers for shift instructions.
|
2019-09-04 11:52:49 +02:00 |
|
peteraa
|
8982b5529c
|
Clarify setup instructions for IF.scala
|
2019-08-28 16:13:15 +02:00 |
|
peteraa
|
f5d038eaf6
|
Rewrite exercise stuff
|
2019-06-07 19:54:18 +02:00 |
|
peteraa
|
932413bb3d
|
Nuke
|
2019-06-07 17:43:33 +02:00 |
|