2024 update

This commit is contained in:
cbezaitis 2024-08-15 19:43:21 +03:00
parent 0125e50b02
commit bbec50480e
3 changed files with 9 additions and 481 deletions

View file

@ -6,13 +6,19 @@ The project itself is broken into four seperate milestones where each one adds a
**** Milestone 1: Creating a Basic Datapath (30 Points)
The goal of the first milestone is to establish basic CPU functionality and correctness for simple programs. To facilite this four NOP instructions will be inserted in between each regular instruction so that the CPU does not have to deal with any kind of hazards or forwarding. To get full credit on milestone 1 all "basic" tests must run with NOPs inserted.
**** Milestone 2: Completeing the Datapath (30 Points)
**** Milestone 2: Completing the Datapath (30 Points)
Milestone 2 is a simple evolution of milestone 1. To get full credit on milestone 2 all of the RISCV32I instructions should be added to the design, and the full battery of tests in "basic" and "programs" should successfully execute when NOPs are turned on.
**** Milestone 3: Pipelining the CPU (30 Points)
**** Milestone 3: Pipelining the CPU (Basic Datapath) (30 Points)
For the 3rd milestone NOPs between every instruction are disabled, and the support for pipelining is added so as to increase CPU performance. Getting this working requires adding support to handle RAW Hazards, Control Hazards, and delay after load. To get full credit for milestone 3 NOPs must be turned off, and all tests in "basic" and "programs" must run successfully.
**** Milestone 4: Further Performance Improvments: (100 Points)
To get full credit on milestone 3 all "basic" tests must run with NOPs inserted.
**** Milestone 4: Pipelining the CPU (Completing the Datapath) (30 Points)
To get full credit on milestone 3 all "programs" tests must run with NOPs inserted.
**** CPU project final delivery: (70 Points)
The forth and final milstone represents the culmination of all previous work into a single deisgn while aiming to further increase performance. For the final part of this project students are required to add additional hardware of their own choosing to the CPU to try and make it even faster than what was done in milestone 3. Student have the freedom to choose their own component to work on, though we have several optional suggestions as well. To get full credit on milestone 4 a simple version of at least one of the following hardware upgrades must be implemented, this will need to be explained verbally to a TA during a lab session. Additionally all tests in "basic" and "programs" must run successfully. Finally, your code must be uploaded to the course website where it will be evaluated.
- Branch Prediction