Working adder.
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9 changed files with 214 additions and 42 deletions
29
src/main/scala/EXBarrier.scala
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29
src/main/scala/EXBarrier.scala
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package FiveStage
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import chisel3._
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import chisel3.experimental.MultiIOModule
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class EXBarrier extends MultiIOModule {
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val io = IO(
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new Bundle {
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val writeDataIn = Input(UInt(32.W))
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val writeDataOut = Output(UInt(32.W))
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val writeAddrIn = Input(UInt(5.W))
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val writeAddrOut = Output(UInt(5.W))
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val writeEnableIn = Input(Bool())
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val writeEnableOut = Output(Bool())
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})
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val writeData = RegInit(UInt(32.W), 0.U)
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writeData := io.writeDataIn
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io.writeDataOut := writeData
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val writeAddr = RegInit(UInt(5.W), 0.U)
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writeAddr := io.writeAddrIn
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io.writeAddrOut := writeAddr
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val writeEnable = RegInit(Bool(), false.B)
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writeEnable := io.writeEnableIn
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io.writeEnableOut := writeEnable
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}
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