kaholaz/TDT4255
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Github render test

Browse source
This commit is contained in:
peteraaser 2020-06-01 14:16:08 +02:00
parent f32d674616
commit 3b635be2dc
5 changed files with 31 additions and 194 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/main/scala/Decoder.scala
View file

@ -8,7 +8,7 @@ import chisel3.util.ListLookup
* This module is mostly done, but you will have to fill in the blanks in opcodeMap.
* You may want to add more signals to be decoded in this module depending on your
* design if you so desire.
*
*
* In the "classic" 5 stage decoder signals such as op1select and immType
* are not included, however I have added them to my design, and similarily you might
* find it useful to add more
@ -36,12 +36,12 @@ class Decoder() extends Module {
val Y = 1.asUInt(1.W)
/**
* In scala we sometimes (ab)use the `->` operator to create tuples.
* In scala we sometimes (ab)use the `->` operator to create tuples.
* The reason for this is that it serves as convenient sugar to make maps.
*
*
* This doesn't matter to you, just fill in the blanks in the style currently
* used, I just want to demystify some of the scala magic.
*
*
* `a -> b` == `(a, b)` == `Tuple2(a, b)`
*/
val opcodeMap: Array[(BitPat, List[UInt])] = Array(